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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-26 13:41:05 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-26 13:41:05 -0800
commit58628a7831edac5f7a13baa9d9320c758c5204c8 (patch)
tree65bd81f7a4d1e97f80cfa707f4a0dfe0bb1bf282
parent08b022a9655bf925e6683422590306429b752ccd (diff)
parent45db07382a5c78b0c43b3b0002b63757fb60e873 (diff)
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Merge branch 'parisc-3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc build fix from Helge Deller: "This unbreaks the kernel compilation on parisc with gcc-4.9" * 'parisc-3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: fix out-of-register compiler error in ldcw inline assembler function
-rw-r--r--arch/parisc/include/asm/ldcw.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/parisc/include/asm/ldcw.h b/arch/parisc/include/asm/ldcw.h
index d2d11b7055b..8121aa6db2f 100644
--- a/arch/parisc/include/asm/ldcw.h
+++ b/arch/parisc/include/asm/ldcw.h
@@ -33,11 +33,18 @@
#endif /*!CONFIG_PA20*/
-/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
+/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.
+ We don't explicitly expose that "*a" may be written as reload
+ fails to find a register in class R1_REGS when "a" needs to be
+ reloaded when generating 64-bit PIC code. Instead, we clobber
+ memory to indicate to the compiler that the assembly code reads
+ or writes to items other than those listed in the input and output
+ operands. This may pessimize the code somewhat but __ldcw is
+ usually used within code blocks surrounded by memory barriors. */
#define __ldcw(a) ({ \
unsigned __ret; \
- __asm__ __volatile__(__LDCW " 0(%2),%0" \
- : "=r" (__ret), "+m" (*(a)) : "r" (a)); \
+ __asm__ __volatile__(__LDCW " 0(%1),%0" \
+ : "=r" (__ret) : "r" (a) : "memory"); \
__ret; \
})